For parallel bus transmission, in which a plurality of parallel bus lines is used to transmit signals simultaneously, Simultaneous Switching Output (SSO) occurs. Signal integrity in SSO, however, may be degraded because of the power and ground noise generated during data transition. When data are toggled, that is, the signals on the parallel bus lines are switched between “0” and “1,” the transited current passes through parasitic inductors and generates the power and ground noise. Parasitic inductors are generally from the packages in which the parallel bus lines are located.
In 2.5-dimensional (2.5D) or 3-dimensional (3D) integrated circuits, the amount of parallel data bus lines has increased from tens to thousands of lines. With the increase in the amount of simultaneous data bus transition, the signal degradation in SSO becomes more severe. Power consumption is also higher.
In previous solutions for reducing the power and ground noise, more power and ground inputs/outputs (I/Os) were used to reduce the parasitic inductance of the packages. More power and ground I/Os, however, result in increased chip area. For high-volume data bus with many bus lines, such chip area increase is sometimes unacceptable.